TECHNOLOGY PROPERTIES LTD. and Patriot Scientific Corp., Plaintiffs, v. MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., et al., Defendants. (Civil Action No. 2:05-CV-494 (TJW).)
Conclusion
The TPL Group has said that its motion to simplify and streamline the Moore Microprocessor Patent™ (MMP) Portfolio infringement trial in the US District Court in the Eastern District of Texas has been granted. Accordingly, a partial judgment of non-infringement on certain products stipulates the following:
Because the limitation “operands in the instruction register must be right justified” is imported during claim construction procedure, the element “instruction groups” of the accused claim of US Patent 5,784,584 (US ‘584) is deemed non-infringed for the purpose of this trial, based on the Court's claim interpretation, thereby allowing appeal from this claim interpretation ruling to be initiated immediately, rather than waiting until the end of trial.
All accused ARM core families (ARM7, ARM9, ARM9E, ARM10E, ARM11), as well as the ARM Cortex microprocessor core family, are deemed non-infringed under the Court's claim interpretation of "instruction groups," thereby removing ARM as an intervener in the Texas Court trial.
Comment
Under above, Manufactors are able to argue that all scalar chips implemented with ARM cores are non-infringed for US ‘584, including MTK’s Atv Dtv product and Genesis’s Dtv product , so as to cut the royalty for MMP.
Moreover, the limitation "operands must be right justified" could be imported to evaluate other MCU core, such as 805X and MIPS, for better argument bases.
Brief
A. background
TPL raised a suit alleged the companies infringed U.S. Patents Nos. 5,809,336; 5,784,584 and 6,598,148
Technology Properties Limited Inc. (TPL) suits against certain companies in the Fujitsu, Matsushita, NEC and Toshiba groups of companies and became a defendant in their court cases., originally filed in October 2005 in the United States District Court for the Eastern District of Texas (Marshall Division), alleged the companies infringed U.S. Patents Nos. 5,809,336; 5,784,584 and 6,598,148. All of the defendants were ARM licensees and as part of the preliminary infringement contentions, filed in July 2006, it was alleged that certain ARM technology infringes a single claim in the 584 patent.
Motion of ARM. Ltd, Inc. To Intervene
On July 18, 2006, TPL served Infringement Contentions accusing at least four Toshiba chips of infringement for which the identification of allegedly infringing technology was various ARM Products.
On August 14, TPL filed a motion to supplement its prior Infringement Contentions and specifically accused ARM Products in at least 5 different Toshiba chips, 2 different MEI chips and an NEC chip. TPL’s contentions are specifically targeted at ARM Products. TPL identifies nothing unique to the accused chip outside of ARM’s Products for these allegations of infringement of the ‘584 patent. In September 2006 ARM filed a motion to intervene in the litigation and that motion has been granted and as a result ARM is now a defendant in the law suit, the company said in a statement accompanying its third quarter financial results.
B. Claim construction
Disputed Construction of the critical claim element “instruction groups”
The plaintiff
“sets of from 1 to a maximum number of sequential instructions, each set being provided to the instruction register as a unit and having a boundary.”
The defendants
"sets of from 1 to a maximum number of sequential instructions, in which the execution of the instruction depends
on each set being provided to the instruction register as a unit and in which any operand that is present must be right justified
and which cannot encompass a single 32–bit traditional conventional instruction."
The dispute
1.whether an operand that is present in the instruction group must be right justified
2.whether the instruction group may encompass a single 32–bit traditional conventional instruction.
C. Reasoning and Holding
Reasoning
The specification and prosecution history refer to the fact that operands in the instruction register must be right justified.
The applicants, however, did not exclude a single 32–bit instruction as an instruction group. In a preferred embodiment, a microprocessor
fetches instructions “in 32–bit chunks called 4–byte instruction groups” where an “instruction group may contain from one to four instructions.
“ 584 patent, 23:4–5, 19:18–19. If a 4–byte (or 32– bit) instruction group contains one instruction, then the instruction group may contain a single 32–bit instruction.
Holding
The Court construes “instruction groups” to mean “sets of from 1 to a maximum number of sequential instructions, each set being provided
to the instruction register as a unit and having a boundary, and in which any operand that is present must be right justified.”
Plaintiff appealed, CAFC AFFIRMED, 276 Fed.Appx. 1019 C.A.Fed. (Tex.),2008.
Conclusion
The TPL Group has said that its motion to simplify and streamline the Moore Microprocessor Patent™ (MMP) Portfolio infringement trial in the US District Court in the Eastern District of Texas has been granted. Accordingly, a partial judgment of non-infringement on certain products stipulates the following:
Because the limitation “operands in the instruction register must be right justified” is imported during claim construction procedure, the element “instruction groups” of the accused claim of US Patent 5,784,584 (US ‘584) is deemed non-infringed for the purpose of this trial, based on the Court's claim interpretation, thereby allowing appeal from this claim interpretation ruling to be initiated immediately, rather than waiting until the end of trial.
All accused ARM core families (ARM7, ARM9, ARM9E, ARM10E, ARM11), as well as the ARM Cortex microprocessor core family, are deemed non-infringed under the Court's claim interpretation of "instruction groups," thereby removing ARM as an intervener in the Texas Court trial.
Comment
Under above, Manufactors are able to argue that all scalar chips implemented with ARM cores are non-infringed for US ‘584, including MTK’s Atv Dtv product and Genesis’s Dtv product , so as to cut the royalty for MMP.
Moreover, the limitation "operands must be right justified" could be imported to evaluate other MCU core, such as 805X and MIPS, for better argument bases.
Brief
A. background
TPL raised a suit alleged the companies infringed U.S. Patents Nos. 5,809,336; 5,784,584 and 6,598,148
Technology Properties Limited Inc. (TPL) suits against certain companies in the Fujitsu, Matsushita, NEC and Toshiba groups of companies and became a defendant in their court cases., originally filed in October 2005 in the United States District Court for the Eastern District of Texas (Marshall Division), alleged the companies infringed U.S. Patents Nos. 5,809,336; 5,784,584 and 6,598,148. All of the defendants were ARM licensees and as part of the preliminary infringement contentions, filed in July 2006, it was alleged that certain ARM technology infringes a single claim in the 584 patent.
Motion of ARM. Ltd, Inc. To Intervene
On July 18, 2006, TPL served Infringement Contentions accusing at least four Toshiba chips of infringement for which the identification of allegedly infringing technology was various ARM Products.
On August 14, TPL filed a motion to supplement its prior Infringement Contentions and specifically accused ARM Products in at least 5 different Toshiba chips, 2 different MEI chips and an NEC chip. TPL’s contentions are specifically targeted at ARM Products. TPL identifies nothing unique to the accused chip outside of ARM’s Products for these allegations of infringement of the ‘584 patent. In September 2006 ARM filed a motion to intervene in the litigation and that motion has been granted and as a result ARM is now a defendant in the law suit, the company said in a statement accompanying its third quarter financial results.
B. Claim construction
Disputed Construction of the critical claim element “instruction groups”
The plaintiff
“sets of from 1 to a maximum number of sequential instructions, each set being provided to the instruction register as a unit and having a boundary.”
The defendants
"sets of from 1 to a maximum number of sequential instructions, in which the execution of the instruction depends
on each set being provided to the instruction register as a unit and in which any operand that is present must be right justified
and which cannot encompass a single 32–bit traditional conventional instruction."
The dispute
1.whether an operand that is present in the instruction group must be right justified
2.whether the instruction group may encompass a single 32–bit traditional conventional instruction.
C. Reasoning and Holding
Reasoning
The specification and prosecution history refer to the fact that operands in the instruction register must be right justified.
The applicants, however, did not exclude a single 32–bit instruction as an instruction group. In a preferred embodiment, a microprocessor
fetches instructions “in 32–bit chunks called 4–byte instruction groups” where an “instruction group may contain from one to four instructions.
“ 584 patent, 23:4–5, 19:18–19. If a 4–byte (or 32– bit) instruction group contains one instruction, then the instruction group may contain a single 32–bit instruction.
Holding
The Court construes “instruction groups” to mean “sets of from 1 to a maximum number of sequential instructions, each set being provided
to the instruction register as a unit and having a boundary, and in which any operand that is present must be right justified.”
Plaintiff appealed, CAFC AFFIRMED, 276 Fed.Appx. 1019 C.A.Fed. (Tex.),2008.
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